? isolation : meets or exceeds 802.3 ieee requirements ? characteristic filter impedance : 100 w ? insertion loss (db max.) common mode rejection (db min.) crosstalk (db min.) return loss (db min.) -1 -15 1-10 mhz @ 50 mhz -30 -7 -18 @ 100 mhz -35 @ 200 mhz -45 -35 -35 @ 1-10 mhz 5-10 mhz @ 20 mhz @ 25 mhz @ 30 mhz @ 40 mhz xmit rcv xmit rcv xmit rcv xmit rcv xmit rcv xmit rcv xmit rcv xmit rcv xmit rcv -30 -20 -1 -15 -18 -5 -11 -26 -45 -30 -20 electrical parameters @ 25 c 10 base-t interface module cse6192ag-ma rev. - 7/29/98 ? operating temperature range: -40 c to +85 c ? ? general purpose 10 base-t filter module ? ? robust construction withstands current reflow profile ? ? complies with or exceeds ieee 802.3, 10 base-t requirements ? schematic a b c d e f g h i j k l m n p q .910 .370 .215 .700 .010 .100 .490 .016 .008 .110 0 .025 .930 .390 .235 typ. .015 typ. .510 .022 .012 typ. 8 .045 .040 .100 .090 .540 23.11 9.40 5.46 17.78 .254 2.54 12.47 .406 .203 2.79 0 .635 23.62 9.91 5.97 typ. .381 typ. 12.95 .559 .305 typ. 8 1.14 1.016 2.54 2.29 13.72 dimensions dim. min. max. nom. (inches) (millimeters) min. max. nom. package EPE6192AG-M cut-off frequency (mhz) 17 e l e c t r o n i c s i n c . 17 xmit rcv attenuation (db min.) xmit rcv 1.0 mhz tel: (818) 892-0761 fax: (818) 894-5791 http://www.pca.com pca electronics, inc. 16799 schoenborn st. north hills, ca 91343 g l k p pad layout q m a b pin 1 i.d. hf e c d j i n pca EPE6192AG-M date code product performance is limited to specific parameters. data subject to change without prior notice. receive channel 16 14 9 11 12 chip side utp side lpf 1:1 100 w 10 transmit channel 1 3 8 6 5 chip side utp side lpf 1:1 100 w 7
cse6192ag-mb rev. - 7/29/98 10 base-t interface module e l e c t r o n i c s i n c . EPE6192AG-M tel: (818) 892-0761 fax: (818) 894-5791 http://www.pca.com pca electronics, inc. 16799 schoenborn st. north hills, ca 91343 the circuit below is a guideline for interconnecting pcas EPE6192AG-M with a typical 10 base-t phy chip over utp cable. further details of system design, such as chip pin-out, etc. can be obtained from the specific chip manufacturer. typical insertion loss of the isolation transformer/filter is 0.7db. this parameter covers the entire spectrum of the encoded signals in 10 base-t protocols. however, the predistortion resistor network introduces some loss which has to be taken into account in determining how well your design meets the standard template requirements. additionally, the following need to be considered while selecting resistor values : a. the filter needs 100 w termination, thus the thevenins equivalent resistance seen by the filter looking into the transmit outputs from the chip must be equal to a value close to 100 w . the typical driver output impedance is 5 w . thus choose r1 and r2 values that are lowered by 5 w on each leg. following these guidelines will guarantee that the return loss specifications are satisfied at all extremes of cable impedance (i.e. 85 w to 115 w ) while the module is installed in your system. b. that the template requirements are satisfied under the worst case vcc (i.e. 4.5v), will impose a further constraint on resistor selection, in that they ought to be the minimum derived from the calculations. add r3 for more flexibility in setting voltage levels at the outputs. note that some systems have auto polarity detection and some do not. if not, be certain to follow the proper polarity. it is recommended that system designers ground the chip side center taps via a low voltage capacitor. taking the cable side center taps to chassis via capacitors, is not recommended, as this will add cost without containing emi. this may worsen emi, specifically if the primary common mode termination is pulled to ground as shown. the pulldown resistors used around the rj45 connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. their placement and use are to be considered carefully before a design is finalized. it is recommended that there be a neat separation of ground planes in the layout. it is generally accepted practice to limit the plane off at least 0.08 inches away from the chip side pins of EPE6192AG-M. there need not be any ground plane beyond this point. for best results, pcb designer should design the outgoing traces preferably to be 50 w , balanced and well coupled to achieve minimum radiation from these traces. typical application circuit for utp with external resistor network 10 base-t phy rj45* 1 2 6 3 tx+ txd+ rx+ rx- EPE6192AG-M tx+ tx- rx+ rx- 1 2 3 r1 r1 100 w r2 r2 tx- txd- notes : * pin-outs shown are for nic configurations. for hubs and repeaters swap pins 1-2 with pins 3-6. r3 chassis ground 8 7 45 8 6 14 16 9 11 12
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